The DRAM cache for NVM is an new architecture inspired by the promising technology of various Non-volatile Memory includes PCM,STT RAM,RRAM etc. The most -expected product in near future is the Intel Apache-Pass (Octane).

In this architecture, DRAM is not main memory but a cache for large capacity byte-addressable NVM. DRAM acts as an L4 cache in the whole memory hierarchy while NVM acts as the main memory.

To study DRAM cache behavior, large amount of DRAM access trace by real application is necessary. That is what HMTT can provide directly and was used in our research project.