HMTT: Hardware/Software Hybrid Memory Trace Tool

**NEW**

The tutorial slides are available for downloading at here: HPCA2013-Tutorial-HMTT.pdf.

Location

We will give a tutorial on HMTT at HPCA 2013 in Shenzhen, China.

Abstract

The memory system has been drawn enormous research efforts in the past decades due to its fundamental and critical impact on the performance of computer systems. The advent of mutlicore era is increasingly imposing new challenges such as scalability, power and quality of service (QoS). Researchers usually resort to trace-driven memory simulation for studying memory systems in which collecting a complete and detailed address trace is the fundamental step. Yet this step is tremendously time-consuming and difficult, especially for complex workloads involving multiple processes, OS and even I/O etc.
In this tutorial, we will present our efforts to address this challenge. The target audience of the tutorial is computer architecture researchers who are interested in memory system, performance profiling and so forth.

Target Audience

Researchers with some knowledge of computer architecture are welcome to participate in this tutorial.

Topics

In this tutorial, we will present our efforts to address this challenge. Specifically, we will introduce the following topics:

Special Gifts (New Event)

We offer free memory traces to first ten attendees. The traces are collected on real machines, with abundant important information, such as timestamp, pid, cpu-request/io-request, r/w, virt_addr and phys_addr. However, the trace sizes are quite large, being dozens of Gigabytes.

We also suggest those who are interested in the traces bring a disk to the tutorial.

Schedule

The tutorial will take place on Sunday afternoon, February 24th.